With the rapid advances in semiconductor fabrication technology, semiconductor devices are moving towards higher device density and higher level of integration to achieve higher computing speed, greater data storage, and other preferred features. Accordingly, semiconductor fabrication is becoming increasingly demanding on the etching technology used in the fabrication. The etching of gate structures is critical to the fabrication of a semiconductor device. The etching quality of the gate structures not only determines the dimensions of the gate structure, but also determines the electrical parameters such as the saturation drain current of the semiconductor device.
In an existing fabrication process, forming a semiconductor device includes several steps. As shown in FIG. 1, in step S11, a substrate is provided. The substrate includes gate electrode regions and doped regions between adjacent gate electrode regions. The gate electrode regions include active areas and isolation regions between active areas. In step S12, a gate dielectric film is formed on the substrate and a gate electrode film is formed on the gate dielectric film. The gate dielectric film covers the surfaces of the active areas and doped regions in the substrate. In step S13, a hard mask material layer is formed on the gate electrode film and a patterned photoresist layer is formed on the hard mask material layer. The orthogonal projection of the patterned photoresist layer on the substrate covers the active areas and portions of the isolation regions. In step S14, the patterned photoresist layer is used as the etch mask to etch the hard mask material layer and form a hard mask layer. The patterned photoresist layer is removed. In step S15, the hard mask layer is used as the etch mask to etch the gate electrode film and form gate electrodes on the gate dielectric film.
However, the electrical properties and performance of the semiconductor structures fabricated by the existing fabrication process still need to be improved.